The present invention relates to a sense amplifier, more particularly to a current mirror type sense amplifier which is capable of effectively performing its operation in wide range of power voltage level between low power voltage level and high power voltage level.
Generally, a sense amplifier senses the minute voltage difference between two input nodes and amplifies the voltage difference to produce it. The same voltages being applied to two input nodes of sense amplifier can not cause any change in output of the sense amplifier, since there is no voltage difference therebetween.
Accordingly, if a pair of signal lines having the same electrical environment are used as inputs of the sense amplifier, electrical noise commonly induced to the signal line can not affect its output and only the difference signal can be amplified. As the sense amplifier, there are included a current mirror type sense amplifier whose input and output nodes are separated, a cross-couple type sense amplifier whose input and output nodes are common, and etc.
Here, the current mirror type sense amplifier can speedily sense & amplify the minute voltage difference between the two input nodes but the swing depth of its output signal is limited. Thus, the current mirror type sense amplifier is suitable for low voltage and speedy transfer.
FIG. 1 is a circuit diagram of a conventional sense amplifier which is composed of a first, a second and a third current mirror type sense amplifying units 10, 20 and 30.
Referring to FIG. 1, the first current mirror type sense amplifying unit 10 is composed of NMOS transistors NM11, NM12 and NM13, and PMOS transistors PM11 and PM12. The NMOS transistors NM11 and NM12 are for sensing and amplifying and are applied with an input signal BL and an inverted input signal /BL, respectively, through their respective gates. The PMOS transistors PM11 and PM12 serve as a current mirror and the source-drain paths thereof are coupled between the power voltage and the drains of the NMOS transistors NM11 and NM12, respectively. The NMOS transistor NM13 serves as a current source and is applied with a first sense enable signal SE1 through its gate. The drain-source path of the NMOS transistor NM13 is coupled between the common sources of the NMOS transistors NM11 and NM12 and ground. The output signal SAO of the first current mirror type sense amplifying unit 10 is produced from the common drain node of the PMOS transistor PM12 and the NMOS transistor NM12.
Similarly, the second current mirror type sense amplifying unit 20 is composed of NMOS transistors NM22 and NM21, PMOS transistors PM22 and PM21, and an NMOS transistor NM23. The NMOS transistors NM22 and NM21 serve with sensing and amplifying and are applied with the inverted input signal /BL and the input signal BL, respectively, through their respective gates. The PMOS transistors PM22 and PM21 serve as a current mirror and the source-drain paths thereof are coupled between the power voltage and the drains of the NMOS transistors NM22 and NM21, respectively. The NMOS transistor NM23 serves as a current source and is applied with the first sense enable signal SE1 through its gate. The drain-source path of the NMOS transistor NM23 is coupled between the common sources of the NMOS transistors NM22 and NM21 and the ground. The output signal SAOB of the second current mirror type sense amplifying unit 20 is produced from the common drain of the NMOS transistor NM21 and the PMOS transistor PM21.
In addition, the third current mirror type sense amplifying unit 30 is composed of NMOS transistors NM31 and NM32, PMOS transistors PM31 and PM32, and NMOS transistor NM33. The NMOS transistors NM31 and NM32 serve with sensing and amplifying and are applied with the output signal SAO of the first current mirror type sense amplifying unit 10 and the output signal SAOB of the second mirror type sense amplifying unit 20, respectively, through their respective gates. The PMOS transistors PM31 and PM32 serve as a current mirror and the source-drain paths thereof are coupled between the power voltage and the drains of the NMOS transistors NM31 and NM32, respectively. The NMOS transistor NM33 serves as a current source and is applied with a second sense enable signal SE2 through its gate. The drain-source path of the NMOS transistor NM33 is coupled between the common sources of the NMOS transistors NM31 and NM32 and the ground. The output signal OUT of the third current mirror type sense amplifying unit 30 is produced from the common drain of the NMOS transistor NM32 and the PMOS transistor PM32. Here, the second sense enable signal SE2 is activated after the first and the second current mirror type sense amplifying unit 10 and 20 is fully sensed and amplified in response to the first sense enable signal SE1.
The operation of the conventional current mirror type sense amplifier as described above, will be briefly explained.
First of all, the first and the second current mirror type sense amplifying unit 10 and 20 are activated by the first sense enable signal SE1 to primarily sense and amplify the difference between the input signal BL and the inverted input signal /BL. Then, the third current mirror type sense amplifying unit 30 is activated by the second enable signal SE2 to secondly sense and amplify the difference between the output signals SAO and SAOB of the first and the second current mirror type amplifying unit 10 and 20 and then finally produce the output signal OUT.
However, there are problems in the conventional current mirror type sense amplifier as above, that the first and the second current mirror type sense amplifying units can not sense the variation at the input nodes because the input signal and the inverted input signal have the voltage levels around the power voltage due to lowering the power voltage of a semiconductor memory device, and that the gain of the amplifying units are reduced to thereby possibly produce an error data due to noise.